Skip to content

RISC-V encoding bug #595

Open
Open

Description

@petabyt

Some if statements in RISCVAsmBackend.cpp were intended to have multiple statements, but are missing braces. This causes the beq instruction to be encoded as -1 (FF FF FF FF)

Activity

  1. RossComputerGuy commented on Sep 7, 2025

    @RossComputerGuy

    That code is from LLVM 3.9.0, LLVM's current release is 21.1.0. This project really should update LLVM.

  2. petabyt commented on Sep 8, 2025

    @petabyt
    Author

    I don't see any problem with the old LLVM, it's just that the person who backported RISC-V support made a dumb mistake lol

    https://github.com/keystone-engine/keystone/pull/549/files

  3. RossComputerGuy commented on Sep 8, 2025

    @RossComputerGuy

    Says:

    • adds the support for RISC-V architecture (refers to Any plans for RISCV ? #491) from LLVM 9.0.1 version - the first official release of RISC-V to LLVM

    Surely, the RISC-V support from LLVM 9 isn't as stable as something like 21. That's about 6 years of improvements.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Metadata

Metadata

Assignees

No one assigned

    Labels

    No labels
    No labels

    Type

    No type

    Projects

    No projects

      Milestone

      No milestone

      Relationships

      None yet

      Development

      No branches or pull requests

      Issue actions