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[ET-VK][conv2d] Use * and + instead of fma() on f16 vectors - #24939
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## Ulterior Motive Optimizing the FP16 1x1 convolutions of the DSR model on mobile GPUs. ## Rationale **What**: A `mul_add(a, b, c)` helper in `common.glslh` computes `a * b + c`. In shaders that define `HAS_FLOAT16_ACCUMULATION`, it uses `*` and `+` for `f16vec4` and `fma()` for `vec4`; in other shaders it is `fma()`. The GEMM tile helper and `conv2d_tiled` call it instead of `fma()`, and the conv2d shaders that accumulate in f16 vectors define the marker: `conv2d_pw_tiled`, `conv2d_tiled` and the buffer input `conv2d_gemm`. **Why**: Adreno 740 and 750 run `fma()` on f16 vectors at about half the speed of a multiply and an add. With this commit, Half pointwise convolutions take 0.37 to 0.49 of the time on a Galaxy S23 (Adreno 740) and a Galaxy S24 (Adreno 750). Replacing `fma()` in every shader regardless of type made Float shaders up to 1.35 times as slow on the same phones, so the form depends on the type. ## Details - **Before**: Multiply-accumulates call `fma()` for both dtypes. - **After**: In the Half variants of `conv2d_pw_tiled`, `conv2d_tiled` and the buffer input `conv2d_gemm`, multiply-accumulates on f16 vectors compute `c + a * b`. Every other shader still calls `fma()`, including the other users of the GEMM tile helper (linear, matmul, Q4 and Q8 linear, fused SDPA). `f16vec4` is a type only when `GL_EXT_shader_explicit_arithmetic_types_float16` is enabled, so a shader opts in by defining `HAS_FLOAT16_ACCUMULATION` before it includes `common.glslh`; without it, `mul_add` is a macro for `fma()`. Two alternatives do not work: - Enabling the extension in `common.glslh` for every shader changes implicit conversions in shaders that do not use f16 arithmetic (`max_pool2d`'s `mix()` call becomes ambiguous). - The extension's own macro cannot be the guard: glslang defines `GL_EXT_shader_explicit_arithmetic_types_float16` whether or not the extension is enabled. Other shaders that accumulate in f16 vectors can opt in once their accuracy and performance are measured. `c + a * b` rounds the product before the add, which `fma()` does not. On Adreno 740 and 750, the f16 error statistics of some conv2d correctness configurations change; all still pass. Outputs on Adreno 840, Mali-G715 and Xclipse 940 are bit-identical to the parent's. Only 16 SPIR-V modules change: the Half `conv2d_pw_tiled` (4), `conv2d_tiled` (11) and `conv2d_gemm_buffer_half` modules. Differential Revision: [D130986954](https://our.internmc.facebook.com/intern/diff/D130986954/) ghstack-source-id: 469962064 Pull-Request: #24856
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/24939
Note: Links to docs will display an error until the docs builds have been completed. ❗ 1 Active SEVsThere are 1 currently active SEVs. If your PR is affected, please view them below: ❌ 1 New Failure, 14 Pending, 1 Unrelated FailureAs of commit 957a369 with merge base 115655c ( NEW FAILURE - The following job has failed:
BROKEN TRUNK - The following job failed but were present on the merge base:👉 Rebase onto the `viable/strict` branch to avoid these failures
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This PR was created by the merge bot to help merge the original PR into the main branch.
ghstack PR number: #24856 by @SS-JIA
^ Please use this as the source of truth for the PR details, comments, and reviews
ghstack PR base: https://github.com/pytorch/executorch/tree/gh/SS-JIA/707/base
ghstack PR head: https://github.com/pytorch/executorch/tree/gh/SS-JIA/707/head
Merge bot PR base: https://github.com/pytorch/executorch/tree/gh/SS-JIA/706/orig
Merge bot PR head: https://github.com/pytorch/executorch/tree/gh/SS-JIA/707/orig
Differential Revision: D130986954
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