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Bare-metal wolfBoot port for the Infineon PSOC Edge E8 family, running on the Secure CM33 as the first image extended boot launches from QSPI.
What it adds
hal/psoc_e8.{c,h,ld}- SCB console, QSPI program/erase over SMIF MMIO while executing in place, RRAM writesconfig/examples/psoc_e8_ai.config,arch.mk- KIT_PSE84_AI layout, board options,PSOC_E8_BOOT_RRAM=1for an RRAM-resident wolfBoottools/scripts/psoc_e8/- MCUboot header wrap for extended boot and a KitProg3/OpenOCD flash scriptdocs/Targets.mdTouches shared code
test-app/Makefile- the test-app builds its HAL copy astest-app/hal_$(TARGET).o, so a secondmakeno longer relinks it into wolfBoot (undefinedhal_initon psoc_c3 and psoc_e8)Hardware / test status
Validated on KIT_PSE84_AI (KitProg3): boot and ECC256 verify, A/B update, resume after a mid-swap reset, RRAM write, wolfCrypt test and benchmark.
Scope
RRAM boot is build-tested only (needs Edge Protect boot policy provisioning). CM55, TrustZone NS app, crypto acceleration and the Secure Enclave are follow-on.